Performance Analysis of Finite-Buffered Asynchronous Multistage Interconnection Networks

In this paper, we present a queueing model for performance analysis of nite-buuered multistage interconnection networks. The proposed model captures network behavior in an asynchronous communication mode and is based on realistic assumptions. A uniform traac model is developed rst and then extended to capture non-uniform traac in the presence of hot-spot. Throughput and delay are computed using the proposed model and the results are validated via simulation. The analysis is extended to predict performance of MIN-based multiprocessors where the concept of the maximum number of outstanding memory requests is included. The eeects of buuer length, switch size, and the maximum allowable outstanding requests on the system performance are discussed. Various design decisions using this model are drawn with respect to delay, throughput, and system power.